CDB4228A
DS511DB1 9
VLOGIC SEL
+12V
GND
-12V
+5V
+5V
+3.3V
VD SEL
+3.3V
+5V
A/D Input
A/D Input
OUTR+
OUTL-
OUTR-
OUTL+
AINL
AINR
Host Interface
Parallel Port
D[7..0]
STATUS[3..0]
ACKn
A[1..0]
RESETn
STROBEn
SPDIF In
SPDIF RX
MCLK
SDOUT
FSYNC
SCLK
M[3..0]
RXPWR
RX_CBL
RX_U
RX_C
RX_ERF
RX_VERF
Power
Power
+5VBUS
+12VBUS
GND
-12VBUS MRESETn
PPRESETn
MUTEC
MUTE
X_RESETn
SPDIF Out
SPDIF TX
RESETn
SDIN
SCLK
LRCLK
MCLK
M[2..0]
TX_U
TX_C
TX_CBL
Digital Audio Port (DAP)/External Control
DAP
SCLK
LRCLK
DAP_SDOUT
MCLK
DAP_CTRL
X_SDA
X_SCL
X_AD0/CS
X_RESETn
MUTEC
DAP_SDIN[3..1]
Output Buffer2
Out2
IN
MUTE
Output Buffer3
Out3
IN
MUTE
Output Buffer4
Out4
IN
MUTE
Output Buffer5
Out5
IN
MUTE
Reference Clock
RefClk
SPDIF_MCLK
DAP_MCLK REFCLK
REFCLK_CTRL[3..0]
Output Buffer6
Out6
IN
MUTE
Programmable Logic
PLD
D[7..0]
A[1..0]
STROBEn
STATUS[3..0]
SDA/CDOUT
SCL
AD0/CS
CDIN
ACKn
TX_M[2..0]
RX_M[3..0]
REFCLK_CTRL[3..0]
RXPWR
DAP_CTRL
TX_CBL
TX_C
TX_U
RX_CBL
RX_C
RX_U
X_CTRLMRESETn
CTRL_MODE
SCLK
TX_MCLK
CLKIN
LRCLK
RX_VERF
RX_ERF
SPDIF_SDOUT
SDIN[3..1]
DAP_SDIN[3..1]
SDIN_CTRL
MODE_CTRL[9..0]
Output Buffer1
Out1
IN
MUTE
Control Switches
CONTROL
X_CTRL
SDIN_CTRL
CTRL_MODE
SDOUT_LOAD
MODE_CTRL[9..0]
SCLK
DAP_MCLK
CLKIN
LRCLK
SDOUT
DAP_MCLK
SPDIF_MCLK
REFCLK_CTRL[3..0]
SCLK
SPDIF_SDOUT
SPDIF_MCLK
RX_M[3..0]
LRCLK
DAP_CTRL
AOUT6
AOUT5
AOUT4
AOUT3
AOUT2
AOUT1
RXPWR
MRESETn
LRCLK
TX_M[2..0]
SDOUT
SCLK
TX_U
TX_C
TX_CBL
RX_C
RX_U
RX_CBL
SDA/CDIN
SCL
AD0/CS
X_RESETn
MUTEC
LRCLK
CLKIN
SCLK
SDOUT
MRESETn
SDIN3
AOUT4
AOUT3
AOUT5
SDIN1
SDIN2
AOUT6
MUTEC
AINR-
AOUT1
AOUT2
FILT
AINL+
AINL-
AINR+
TX_MCLK
RX_ERF
RX_VERFAINR+
AINL-
AINL+
AINR-
DAP_SDIN[3..1]
SDIN3
X_CTRL
RX_VERF
TX_M[2..0]
REFCLK_CTRL[3..0]
LRCLK
RX_M[3..0]
MUTEC
TX_CBL
CLKIN
D[7..0]
SCLK
RX_C
PPRESETn
SDIN2
SDA/CDIN
SDIN1
RX_ERF
TX_C
TX_U
SDIN_CTRL
CTRL_MODE
TX_MCLK
AD0/CS
SDIN[3..1]
RX_U
A[1..0]
STATUS[3..0]
RX_CBL
SPDIF_SDOUT
AD0/CS
SCL
DAP_SDIN[3..1]
SDA/CDIN
DAP_CTRL
RXPWR
MRESETn
STROBEn
ACKn
MUTE
+12VBUS
MUTE
-12VBUS MRESETn
GND X_RESETn
PPRESETn
MUTEC+5VBUS
SDIN1
SDIN2
SDIN3
SPDIF_SDOUT
DAP_SDIN1
SPDIF_SDOUT
DAP_SDIN2
SPDIF_SDOUT
DAP_SDIN3
SCL
SDIN_CTRL
X_CTRL
CTRL_MODE
SDOUT
MODE_CTRL[9..0]
MODE_CTRL[9..0]
GND
VA
GND
VD
VCC
GND
GND
GNDGND
VD
VL
VCC
GND
TP16
+
C8
10uf
TP6
TP8
TP18
TP10
TP20
R98 150
R103 150
C9
47nf
TP23
TP13
R99 150
C12
47nf
TP15
J5
TERMINAL GREEN
1
TP17
J6
TERMINAL RED
1
TP25
R100 150
JP3
HEADER 2X2
12
34
J4
TERMINAL BLACK
1
R5 10k
TP19
J3
TERMINAL BLUE
1
TP3
+
C5
10uf
R104
75
TP21
JP11
HEADER 2X2
12
34
R6 3.16k
TP22
TP5
J1
PHONO JACK RA
1
2
J2
PHONO JACK RA
1
2
TP24
+
C7
10uf
JP5
HEADER 2X2
12
34
C6
47nf
TP7
R101 150
TP9
TP26
JP6
HEADER 2X2
12
34
TP27
TP11
C13
47nf
JP4
HEADER 2X2
12
34
TP12
R7 10k
U3
CS4228A-KS
23
24
25
26
27
28
16
17
20
19
18
5
6
3
2
1
4
10
11
12
13
14
15
8
7 22
21
9
AOUT1
AOUT2
AOUT3
AOUT4
AOUT5
AOUT6
AINR+
AINR-
AINL+
AINL-
FILT
SCLK
LRCLK
SDIN1
SDIN2
SDIN3
SDOUT
CLKIN
SCL/CCLK
SDA/CDIN
AD0/CS
RESET
MUTEC
VD
DGND AGND
VA
VL
TP14
R102 150
TP4
Figure 1. CDB4228A Top Level Schematic
(15 paginas)
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